Monte Carlo (MC) simulation for Double Gate (DG) Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs)
As the need for faster and efficient Integrated Circuits (ICs) grows, the number of transistors in a chip also needs to increase. At present, billions of transistors are integrated in a chip. In order to put these many transistors in a chip, the size of each transistor needs to be extremely small. However, scaling Metal-Oxide Semiconductor Field-Effect-Transistor (MOSFET) below 0.1 mm node introduces Short Channel Effect (SCE). The classical MOSFET is currently being modified to overcome the SCE. Double Gate (DG) MOSFET is one of the promising devices to overcome the SCE. However, it gets very expensive to manufacture the ICs of nano scale size. Therefore, current studies on transistors rely on computer simulation. In this work, we scaled and characterized a 20nm DGMOSFET using a 2D particle Monte Carlo simulator, to gain deeper understanding of transport properties at such scaling limit. Results have shown that DG structures provide better suppression of SCE.
School:
University of New Orleans
Department:
Electrical and Computer Engineering
Research Advisor:
Umberto Ravaioli
Department of Research Advisor:
Electrical and Computer Engineering
Year of Publication:
2006